NurLogic to Develop IP Libraries and the Industry's Only Available Specialty I/Os Optimized for TSMC's 0.13-Micron Process
SAN DIEGO, Dec. 4 /PRNewswire/ -- NurLogic Design, Inc., a privately held,
high-growth, semiconductor technology and intellectual property (IP) company,
today announced an agreement to develop IP optimized for Taiwan Semiconductor
Manufacturing Company's (TSMC) 0.13-micron process technology.
TSMC's
leading-edge 0.13-micron process technology accelerates NurLogic's development
of standard cell libraries, I/Os and the industry's only available specialty
I/Os with a significant combination of baseline, high-performance and
low-voltage capabilities.
The agreement provides a comprehensive IP product
roadmap that utilizes 0.25-, 0.18-, 0.15- and 0.13-micron process technologies
ideal for industry-leading networking and communication applications. ``As the technology leader in the foundry industry, we are seeing great
demand for our deep-submicron process geometries,'' said Kurt Wolf, TSMC's
director of marketing.
``NurLogic has clearly demonstrated the expertise
crucial in meeting the challenging design parameters associated with the
0.13-micron process.
Our customers will benefit from the partnership with
NurLogic as it expedites the delivery of the advanced 0.13-micron libraries,
I/Os and specialty I/Os they require.'' Under the agreement, NurLogic will develop standard cell libraries, I/O
libraries, and specialty I/Os.
These designs are optimized for TSMC's high-
performance, low-voltage (CL013LV), and core (CL013G) 0.13-micron process
technologies for CPU, communications, and system-on-chip applications.
NurLogic and TSMC have also made plans to develop a line of libraries in
support of TSMC's 0.13-micron low power process for portable and wireless
applications. NurLogic's TSMC 0.13-micron specialty I/Os include LVDS for signaling and
implementing GHz-level communications; PECL for differential I/O and clocked
outputs; SSTL for high-speed GUI interfacing; HSTL for communications; DDR for
double date rate DRAM interfacing; and AGP4x for High speed GUI interfacing.
NurLogic's standard cell library contains more than 1000 specific elements
covering an extensive range of functions, which include flip-flops, latches
and complex cells.
The company's I/O libraries for the TSMC 0.13-micron
process are pad and core limited and support a wide variety of drive strengths
and I/O control functions. ``This latest agreement with TSMC positions NurLogic to offer some of the
first available IP solutions in the 0.13-micron process with an enhanced level
of performance at low voltage operation,'' said Dave Matty, Ph.D., NurLogic's
president and CEO.
``As companies move toward utilizing smaller process
technologies, NurLogic will continue to work with TSMC, a pioneer and leader
in the semiconductor foundry industry, to deliver a wide selection of robust,
optimized IP solutions for advanced SOC design.'' ABOUT TSMC TSMC is the world's largest dedicated semiconductor foundry, providing the
industry's leading process technology, library and IP options and other
leading-edge foundry services.
TSMC operates two six-inch wafer fabs (Fab 1
and 2) and six eight-inch wafer fabs (Fab 3, 4, 5, 6, 7 and 8).
The company
has substantial capacity commitments at three joint venture fabs -- Vanguard,
WaferTech, and SSMC.
TSMC is currently ramping the industry's first 300mm
pilot line at its Fab 6 and is constructing three dedicated 300mm fabs, Fab 12
in Hsin-Chu and Fabs 14 and 15 in Tainan.
In 2001, TSMC expects to support a
capacity of nearly 4.8 million eight-inch equivalent wafers.
Fabrication
processes offered by TSMC include CMOS logic, mixed-mode/RF, volatile and
non-volatile memory, and BiCMOS.
TSMC's corporate headquarters are in
Hsin-Chu, Taiwan.
More information about TSMC is available through the World
Wide Web at http://www.tsmc.com. ABOUT NURLOGIC DESIGN, INC. NurLogic Design, Inc. provides a broad range of semiconductor technology
products, including Foundation IP, such as standard cell libraries, I/Os,
specialty I/Os and embedded memory cores; higher level analog and mixed signal
IP cores; SOC Design Services and ASSP design.
NurLogic is a privately held
corporation headquartered at 9710 Scranton Road, Suite 380, San Diego, CA
92121.
Further information on NurLogic can be found on the web at
www.nurlogic.com or by calling 1-877-NURLOGIC.
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